This thesis examines the design flow of a Basketball Scoreboard controller implemented on a VLSI (Very Large Scale Integration) Chip. It is compared to an existing design (US patent #4904981) that is based on a Micro-controller, and found that the VLSI chip will be much more effective in using resources.
The thesis then gives a brief overview of the fundamentals of VLSI design, and how it pertains to a strictly digital design. The design flows for a VLSI component and those of more conventional designs are compared. This thesis will compare these using the Mentor GraphicsÓ suite.
The final implementation of the Basketball scoreboard controller is given with emphasis on design decisions to make the chip more cost-effective. With a process technology of 2um, the final chip is found to contain 1607 nets, 1597 gates, 15996 transistors and has an area of 22.09mm2. It is decided that even though the design flow was more advantageous to the designer, the chip itself was not cost-effective enough to produce.
With careful planning and using more area-friendly methods of construction, it should be able to reduce this chip in size by a significant amount. This would make the product more viable in an economic situation, and may have a small market in the long-term future.
Conference Paper:
Conference Paper
Complete thesis:
Thesis paper
Additional material:
code