Hardware Implementation of Video Streaming

Student: Jorgen Matthew David Peddersen

Supervisor: Dr. Peter Sutton

Category: Computer Systems Engineering Thesis Project

This thesis describes a purely hardware implementation of simple real-time video streaming using an FPGA (Field Programmable Gate Array). Video streaming is presently performed using mainly software-based techniques on dedicated computers, as designing pure hardware solutions can be slower and harder to debug. The advantage of hardware designs is in cost, as one chip could be mass produced to perform simple video streaming tasks and used in areas such as security video cameras and other live video feeds.

The implementation discussed herein uses the XSV-300 FPGA board designed by XESS Corporation to implement a real-time video streaming system. The board provides a simple video decoding chip, a network interface chip and a Xilinx XCV300 FPGA. The FPGA is configured with code designed in VHDL that handles control of the chips involved to implement a sturdy video streaming design. The resulting implementation allows streaming of any RCA or S-Video data source into UDP packets that can be transmitted over the network to a destination host.

The final result is a complete streaming design that does not require a PC. This design has been fully tested and performs well. Possible sources that can be streamed are TV, DVD and game consoles. At its present stage, the image quality and the network bandwidth required for the design are not a match for software-based techniques, although with some future work, the design could match these more expensive solutions in quality and speed.

Poster Presentation (PDF)

Thesis Document (PDF)