Investigation into the Benefits of Advanced Hidden Surface Removal in Hardware Accelerated 3D Rendering Pipelines

Student: David Rodney Pershouse

Supervisor: Dr. Kevin Gates

Category: Software Engineering Thesis Project

Most realtime 3d rendering systems have been using the same algorithms and data structures for many years. These algorithms were developed when all steps of the rendering pipeline were performed on the CPU. Transformation, Hidden Surface Removal, Lighting, Texturing and Rasterising. Not much CPU time could be devoted to the removal of hidden polygons in any particular scene (occlusion culling). With many of todays personal computer's having hardware rendering capabilities, a lot of the load has been taken off the CPU. Infact it is often the case that the only limiting factor in the speed of rendering in modern PCs is the polygon output (Triangles per second) of the hardware accelerator. Still the vast majority of realtime 3d engines still render polygons that can't be seen. With the only limitation of rendering speed being polygon throughput, it is hypothesised that a speed increase could be gained by removing hidden polygons. With texturing, lighting and rasterising all done on the accelerator the CPU has now only one job in the rendering pipeline,and that is hidden surface removal.With the introduction of above 1GHz and above processors into the mainstream personal computer market, the CPU has a lot more spare cycles to use on removing polygons that can't be seen and more complex occlusion culling methods than those currently in use have now become feasable. This thesis to provides quantitative data pertaining to the advantages of improved hidden surface removal by implementing several hidden surface removal algorithms within a realtime 3d rendering engine.

The algorithm selection will be based on the likeliness of it providing an advantage in a hardware accelerated 3d rendering pipeline, like those found in todays personal computers, when rendering 3d environments similar to those common to the electronic entertainment industry. These will be tested on average frames per second generated across a scene and average number of polygons removed from the pipeline per scene, and factors such as screen artefacts and memory space required will be compared.

Poster Presentation (PDF)

Thesis Document (PDF)