Advanced Encryption Standard co-processor

Student: Elliot Mackenzie

Supervisor: Adam Postula

Category: Engineering Thesis Project - Computer Systems

Advanced Encryption Standard (AES) is the most recent US Government endorsed encryption algorithm and supersedes both DES and Triple-DES. This project involved the development of an AES encryption core on re-programmable hardware (a 100K Xilinx Spartan II Field Programmable Gate Array or FPGA), and the use and evaluation of the Celoxica DK1 rapid hardware development tool in the process.

Celoxica argue that DK1 has on average a substantially shorter time to production than hardware developed using VHDL or Verilog. Despite some early problems with the Handel-C compiler (some of which were reported to the manufacturer and subsequently verified as compiler bugs), the experience gained from this project supports Celoxica’s claim. The same design would have taken much more time, and would have been harder to debug if it was developed in the alternative environments.

The completed design is an encryption core that can be inserted into hardware designs requiring secured transactions.

This hardware-only implementation has several key advantages over software:

- Mass-production can make available a high-level of transaction security to low-cost systems (such as EFTPOS or credit card vending machines);

- A hardware-only solution will yield a substantially higher performance/cost ratio compared to a software-only solution; and

- No operating costs, maintenance costs, or software to install.

Furthermore, with the addition of external memory, the performance of this prototype device would be significantly improved.

Thesis Document (PDF)