ASi Bus Master Controller

Student: Serena Chan

Supervisor: Adam Postula

Category: Engineering Thesis Project - Computer Systems

In today’s world and society, technology and automation is very important in manufacturing. The main system components for automation are sensors and actuators. In communications, a superior control unit known as the master controller is necessary to drive the slave nodes. In a system as such, it’s needless to say; a high integrity in data exchanges, simple maintenance as well as a cost-effective digital solution is of great importance. The ASi bus master controller is a solution of such.

Imagine, instead of a switchboard full of wires for each and every electrical device control, a small control unit that allows one to control the same number of devices without the whole wire mess. In addition, it’s more secure, guarantees a higher integrity in data transfer, gives better respond time and low in cost. All this will be possible by implementing the master bus controller with ASi field bus on a FPGA.

The outcome of this study was the partial development of an ASI master bus controller. Only one of the FSMs from the master controller system was constructed. This FSM, the inclusion phase, is a huge part of the entire master controller system and would be used to prove the functionality of the system. The master controller will be built upon the Xilinix Spartan II FPGA. Slave chips from Siemens, SAP4.1, will be used to test and simulate the result of the product.

Thesis Document (PDF)

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